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????????????????????????????????????????????????????????????????? maxim integrated products 1 general description the max17595/MAX17596/max17597 is a family of peak- current-mode controllers which contain all the circuitry required for the design of wide input-voltage flyback and boost regulators. the max17595 offers optimized input rising and falling thresholds for universal input ac-dc converters and telecom dc-dc (36vC72v input range) power supplies. the MAX17596 offers input rising and falling thresholds suitable for low-voltage dc-dc applications (4.5vC36v input range). the max17597 offers all circuitry needed to implement a boost converter controller. all three controllers contain a built-in gate driver for external n-channel mosfets. the max17595/MAX17596/max17597 house an inter - nal error amplifier with 1% accurate reference, useful in implementations without the need for an external reference. the switching frequency is programmable from 100khz to 1mhz with an accuracy of 8% using an external resistor, allowing optimization of magnetic and filter components, resulting in compact and cost-effective power conversion solutions. for emi sensitive applica - tions, the max17595/MAX17596/max17597 family incor - porates a programmable-frequency dithering scheme, enabling low-emi spread-spectrum operation. an en/uvlo input allows the user to start the power supply precisely at the desired input voltage, while also functioning as an on/off pin. the ovi pin enables implementation of an input overvoltage protection scheme, ensuring that the converter shuts down when the dc input voltage exceeds a set maximum value. the ss pin allows programmable soft-start time for the power converter, and helps limit inrush current during startup. the max17595/MAX17596/max17597 family also allows the designer to choose between voltage soft-start and current soft-start modes, useful in optoisolated designs. a programmable slope compensation scheme is pro - vided to enhance the stability of the peak-current-mode control scheme. hiccup-mode overcurrent protection and thermal shutdown are provided to minimize dissipation in overcurrent and overtemperature fault conditions. the ic is available in a space-saving 16-pin, 3mm x 3mm tqfn package with 0.5mm lead spacing. benefits and features s peak current mode offline (universal input ac) and telecom (36vC72v) flyback controller (max17595) s peak-current-mode dc-dc flyback controller (4.5vC36v input range) (MAX17596) s peak-current-mode nonsynchronous boost pwm controller (4.5vC36v input range) (max17597) s current mode control provides excellent transient response s low 20a startup supply current s 100khz to 1mhz programmable switching frequency s programmable frequency dithering for low-emi spread-spectrum operation s switching frequency synchronization s adjustable current limit with external current- sense resistor s fast cycle-by-cycle peak current limiting s hiccup-mode short-circuit protection s overtemperature protection s programmable soft-start and slope compensation s programmable voltage or current soft-start schemes s input overvoltage protection s space-saving, 3mm x 3mm tqfn package applications universal input offline ac-dc power supplies wide-range dc-input flyback/boost battery chargers battery-powered applications industrial, telecom, and automotive applications 19-6178; rev 0; 1/12 ordering information/selector guide appears at end of data sheet. for related parts and recommended products to use with this part, refer to www.maxim-ic.com/max17595.related . max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com.
????????????????????????????????????????????????????????????????? maxim integrated products 2 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators v in to sgnd .......................................................... -0.3v to +40v v drv to sgnd .................................. -0.3v to +16v (max17595) v drv to sgnd .......... -0.3v to +6v (MAX17596 and max17597) ndrv to sgnd .................................... -0.3v to +(v drv + 0.3)v en/uvlo to sgnd .................................. -0.3v to +(v in + 0.3)v ovi, rt, dither, comp, ss, fb, slope to sgnd .................................................... -0.3v to +6v cs to sgnd ............................................................ -0.8v to +6v pgnd to sgnd .................................................... -0.3v to +0.3v maximum input/output current (continuous) v in , ndrv ........................................................................ 100ma ndrv (pulsed, for less than 100ns) .................................... q 1a continuous power dissipation tqfn (single-layer board) (derate 20.8mw/ n c above +70 n c) ............................ 1666mw operating temperature range ........................ -40 n c to +125 n c storage temperature range ............................ -65 n c to +150 n c junction temperature ..................................................... +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics (v in = 12v (for the max17595, bring v in up to 21v for startup), v cs = v slope = v dither = v fb = v ovi = v sgnd = 0v, v en/uvlo = +2v; ndrv, ss, comp are unconnected, r rt = 25k i , c vin = 1 f f, c vdrv = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = t j = +25 n c.) (note 2) junction-to-ambient thermal resistance ( q ja ) .............. 48c/w junction-to-case thermal resistance ( q jc ) ..................... 7c/w package thermal characteristics (note 1) parameter symbol conditions min typ max units input supply (v in ) v in voltage range v in max17595 8 29 v MAX17596/max17597 4.5 36 v in bootstrap uvlo wakeup v in-uvr v in rising # max17595 18.5 20 21.5 v MAX17596/max17597 3.5 4 4.4 v in bootstrap uvlo shutdown level v in-uvf v in falling $ max17595 6.5 7 7.7 v MAX17596/max17597 3.3 3.9 4.25 v in supply start-up current (under uvlo) i vin- startup v in < uvlo 20 32 f a v in supply shutdown current i in-sh v en = 0v 20 32 f a v in supply current i in-sw switching, f sw = 400khz 2 ma v in clamp (inc) (max17595 only) v in clamp voltage v inc max17595, i vin = 2ma sinking, v en = 0v (note 3) 30 33 36 v enable (en) en undervoltage threshold v enr v en rising # 1.16 1.21 1.26 v v enf v en falling $ 1.1 1.15 1.2 en input leakage current i en v en = 1.5v, t a = +25 n c -100 +100 na
????????????????????????????????????????????????????????????????? maxim integrated products 3 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators electrical characteristics (continued) (v in = 12v (for the max17595, bring v in up to 21v for startup), v cs = v slope = v dither = v fb = v ovi = v sgnd = 0v, v en/uvlo = +2v; ndrv, ss, comp are unconnected, r rt = 25k i , c vin = 1 f f, c vdrv = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = t j = +25 n c.) (note 2) parameter symbol conditions min typ max units internal ldo (vdrv) v drv output voltage range v drv 8v < v in < 15v and 0ma < i vdrv < 50ma (max17595) 7.1 7.4 7.7 v 6v < v in < 12v and 0ma < i vdrv < 50ma (MAX17596/max17597) 4.7 4.9 5.1 v drv current limit i vdrv-max 70 100 ma v drv dropout v vdrv-do v in = 4.5v, i vdrv = 20ma (MAX17596/ max17597) 4.2 v overvoltage protection (ovi) ovi overvoltage threshold v ovir v ovi rising # 1.16 1.21 1.26 v v ovif v ovi falling $ 1.1 1.15 1.2 ovi masking delay t ovi-md 2 f s ovi input leakage current i ovi v ovi = 1v, t a = +25 n c -100 +100 na oscillator (rt) ndrv switching frequency range f sw 100 1000 khz ndrv switching frequency accuracy -8 +8 % maximum duty cycle d max (max17595/MAX17596) 46 48 50 % (max17597) 90 92.5 95 synchronization (dither) synchronization logic-high input v hi-sync 3 v synchronization pulse width 50 ns synchronization frequency range f syncin (max17595/MAX17596) 1.1 x f sw 1.8 x f sw hz dithering ramp generator (dither) charging current v dither = 0v 45 50 55 f a discharging current v dither = 2.2v 43 50 57 f a ramp-high trip point 2 v ramp-low trip point 0.4 v
????????????????????????????????????????????????????????????????? maxim integrated products 4 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators electrical characteristics (continued) (v in = 12v (for the max17595, bring v in up to 21v for startup), v cs = v slope = v dither = v fb = v ovi = v sgnd = 0v, v en/uvlo = +2v; ndrv, ss, comp are unconnected, r rt = 25k i , c vin = 1 f f, c vdrv = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = t j = +25 n c.) (note 2) parameter symbol conditions min typ max units soft-start/soft-stop (ss) soft-start charging current i ssch 9 10 11 f a soft-stop discharging current i ssdisch for soft-stop enabled parts 4.4 5 5.6 f a ss bias voltage v ss 1.19 1.21 1.23 v ss discharge threshold v ssdisch soft-stop completion 0.15 v ndrv driver (ndrv) pulldown impedance r ndrv-n i ndrv (sinking) = 100ma 1.37 3 i pullup impedance r ndrv-p i ndrv (sourcing) = 5ma 4.26 8.5 i peak sink current c ndrv = 10nf 1.5 a peak source current c ndrv = 10nf 0.9 a fall time t ndrv-f c ndrv = 1nf 10 ns rise time t ndrv-r c ndrv = 1nf 20 ns current-limit comparator (cs) cycle-by-cycle peak -current- limit threshold v cs-peak 290 305 320 mv cycle-by-cycle runaway current-limit threshold v cs-run 340 360 380 mv cycle-by-cycle reverse- current limit threshold v cs-rev -122 -102 -82 mv current-sense leading-edge blanking time t cs-blank from ndrv rising # edge 70 ns propagation delay from comparator input to ndrv t pdcs from cs rising (10mv overdrive) to ndrv falling (excluding leading edge blanking) 40 ns number of consecutive peak- current-limit events to hiccup n hiccup-p 8 event number of runaway-current- limit events to hiccup n hiccup-r 1 event overcurrent hiccup timeout 32768 cycle minimum on-time t on-min 90 130 170 ns slope compensation (slope) slope bias current i slope 9 10 11 f a slope resistor range 25 200 k i slope voltage range to enable current soft-start and minimum slope compensation 0 200 mv
????????????????????????????????????????????????????????????????? maxim integrated products 5 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators electrical characteristics (continued) (v in = 12v (for the max17595, bring v in up to 21v for startup), v cs = v slope = v dither = v fb = v ovi = v sgnd = 0v, v en/uvlo = +2v; ndrv, ss, comp are unconnected, r rt = 25k i , c vin = 1 f f, c vdrv = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = t j = +25 n c.) (note 2) note 2: all devices 100% production tested at t a = +25c. limits over temperature are guaranteed by design. note 3: the max17595 is intended for use in universal input power supplies. the internal clamp circuit at v in is used to prevent the bootstrap capacitor from changing to a voltage beyond the absolute maximum rating of the device when en is low (shutdown mode). externally limit the maximum current to v in (hence to clamp) to 2ma (max) when en is low. parameter symbol conditions min typ max units slope voltage range to enable voltage soft-start and minimum slope compensation 4 v slope voltage range to enable voltage soft-start and programmable slope compensation 0.2 4 v slope compensation ramp r slope = 100k w 140 165 190 mv/ f s default slope compensation ramp v slope < 0.2v or 4v < v slope 50 mv/ f s pwm comparator comparator offset voltage v pwm-os v comp - v cs 1.65 1.81 2 v current-sense gain a cs-pwm d comp/ d cs (t a = +25 n c) 1.75 1.97 2.15 v/v cs peak slope ramp current i csslope ramp current peak (t a = +25 n c) 13 20 f a comparator propagation delay t pwm change in v cs = 10mv (including internal lead-edge blanking) 110 ns error amplifier fb reference voltage v ref v fb , when i comp = 0 and v comp = 1.8v 1.19 1.21 1.23 v fb input bias current i fb v fb = 1.5v, t a = +25 n c -100 +100 na voltage gain a eamp 80 db transconductance gm 1.5 1.8 2.1 ms transconductance bandwidth bw open-loop (gain = 1), -3db frequency 10 mhz source current v comp = 1.8v, v fb = 1v 80 120 210 f a sink current v comp = 1.8v, v fb = 1.75v 80 120 210 f a thermal shutdown thermal shutdown threshold temperature rising +160 n c thermal shutdown hysteresis 20 n c
????????????????????????????????????????????????????????????????? maxim integrated products 6 typical operating characteristics (v in = 15v, v en/uvlo = +2v, comp = open, c vin = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted.) bootstrap uvlo wake-up level vs. temperature (max17595) max17595/6/7 toc01 temperature (c) bootstrap uvlo wake-up level (v) 20 40 60 80 100 120 0 -20 19.99 20.00 20.01 20.02 20.03 20.04 19.98 -40 v in falling threshold vs. temperature (MAX17596 / max17597) max17595/6/7 toc04 temperature (c) v in uvlo shutdown threshold (v) 20 40 60 80 100 120 0 -20 4.00 3.75 -40 3.80 3.85 3.90 3.95 en / uvlo falling threshold vs. temperature max17595/6/7 toc06 temperature (c) en / uvlo falling threshold (v) 20 40 60 80 100 120 0 -20 1.149 1.145 -40 1.146 1.147 1.148 en / uvlo rising threshold vs. temperature max17595/6/7 toc05 temperature (c) en / uvlo rising threshold (v) 20 40 60 80 100 120 0 -20 1.209 1.202 -40 1.203 1.204 1.205 1.206 1.207 1.208 ovi rising threshold vs. temperature max17595/6/7 toc07 temperature (c) ovi rising threshold (v) 20 40 60 80 100 120 0 -20 1.211 1.207 -40 1.208 1.209 1.210 v in wake-up level vs. temperature (MAX17596 / max17597) max17595/6/7 toc02 temperature (c) v in wake-up level (v) 20 40 60 80 100 120 0 -20 4.15 3.90 -40 3.95 4.00 4.05 4.10 v in falling threshold vs. temperature (max17595) max17595/6/7 toc03 temperature (c) v in bootstrap uvlo shutdown level (v) 20 40 60 80 100 120 0 -20 7.000 7.005 7.010 7.015 7.020 7.025 6.995 -40 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators
????????????????????????????????????????????????????????????????? maxim integrated products 7 typical operating characteristics (continued) (v in = 15v, v en/uvlo = +2v, comp = open, c vin = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted.) ovi falling threshold vs. temperature max17595/6/7 toc08 temperature (c) ovi falling threshold (v) 20 40 60 80 100 120 0 -20 1.1480 1.1485 1.1490 1.1495 1.1500 1.1505 1.1475 -40 ndrv switching frequency vs. resistor max17595/6/7 toc11 frequency selection resistor (k i ) ndrv switching frequency (khz) 1000 0 51 52 53 54 55 56 57 58 59 5 100 200 300 400 600 700 800 900 500 frequency dithering vs. r dither r dither (k i ) frequency dithering (%) 900 800 700 600 500 400 300 4 6 8 10 12 14 2 200 1000 max17595/6/7 toc13 ndrv switching frequency vs. temperature max17595/6/7 toc12 temperature (c) ndrv switching frequency (khz) 20 40 60 80 100 120 0 -20 950 850 750 650 550 450 350 250 150 50 -40 r rt = 10ki r rt = 100ki switching waveforms (max17595) max17595/6/7 toc14 i pri 1a /div 4s / div v drain 100v/div v in supply current under uvlo vs. temperature max17595/6/7 toc09 temperature (c) v in supply current under uvlo (a) 20 40 60 80 100 120 0 -20 20.5 21.5 22.5 23.5 24.5 25.5 19.5 -40 switching current vs. temperature max17595/6/7 toc10 temperature (c) switching current (ma) 20 40 60 80 100 120 0 -20 2.5 1.5 -40 1.6 1.7 1.8 1.9 2.1 2.2 2.3 2.4 2.0 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators
????????????????????????????????????????????????????????????????? maxim integrated products 8 typical operating characteristics (continued) (v in = 15v, v en/uvlo = +2v, comp = open, c vin = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted.) enable startup max17595/6/7 toc15 comp 1v/div 2ms / div v out 10v/div en / uvlo 5v/div switching current vs. switching frequency switching frequency (hz) switching current (ma) 900 800 700 500 600 400 300 200 1.7 1.9 2.1 2.3 2.5 1.5 100 1000 max17595/6/7 toc18 bode plot (15v output) max17595/6/7 toc20 phase 36/div gain 10db/div bandwidth = 8.8khz phase margin = 64 66 6 82 2 44 18 8 1 load transient response (15v output) max17595/6/7 toc19 20ms / div v out (ac) 0.5v/div i load 0.5a /div load current (a) 0 1.4 1.2 1.0 0.8 0.6 0.4 0.2 efficiency graph (15v output) efficiency (%) 10 20 30 40 60 70 80 90 100 0 50 max17595/6/7 toc21 v dc = 120v enable shutdown max17595/6/7 toc16 comp 1v/div 400s / div v out 10v/div en / uvlo 5v/div hiccup operation max17595/6/7 toc17 1ms / div v out 10v/div v drain 100v/div i pri 2a /div max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators
????????????????????????????????????????????????????????????????? maxim integrated products 9 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators pin description pin configuration pin name function 1, 12 n.c. no connection 2 slope slope compensation input. a resistor, r slope , connected from slope to sgnd programs the amount of slope compensation with reference-voltage soft-start mode. connecting this pin to sgnd enables duty-cycle soft-start with minimum slope compensation of 50mv/ f s. setting v slope > 4v enables reference voltage soft-start with minimum slope compensation of 50mv/ f s. 3 rt switching frequency programming resistor connection. connect resistor r rt from rt to sgnd to set the pwm switching frequency. 4 dither/sync frequency dithering programming or synchronization connection. for spread-spectrum frequency operation, connect a capacitor from dither to sgnd, and a resistor from dither to rt. to synchronize the internal oscillator to the externally applied frequency, connect dither/sync to the synchronization pulse. 5 comp transconductance amplifier output. connect the frequency compensation network between comp and sgnd. 6 fb transconductance amplifier inverting input 7 ss soft-start capacitor pin for flyback regulator. connect a capacitor c ss from ss to sgnd to set the soft-start time interval. 8 sgnd signal ground. connect sgnd to the signal ground plane. 9 cs current-sense input. peak-current-limit trip voltage is 300mv. 10 pgnd power ground. connect pgnd to the power ground plane. 11 ndrv external switching nmos gate-driver output 15 16 14 13 5 6 7 rt dither/ sync 8 n.c. pgnd cs n.c. 13 v in 4 12 10 9 en / uvlo ovi ep sgnd ss fb comp slope ndrv 2 11 v drv tqfn max17595 MAX17596 max17597 top view +
???????????????????????????????????????????????????????????????? maxim integrated products 10 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators pin description (continued) detailed description the max17595 offers a bootstrap uvlo wakeup level of 20v with a wide hysteresis of 15v minimum, and is optimized for implementing isolated and non-isolated universal (85v to 265v ac) offline single-switch flyback converter or telecom (36v to 72v) power supplies. the MAX17596/max17597 offer a uvlo wakeup level of 4.4v and are well-suited for low-voltage dc-dc flyback/ boost power supplies. an internal 1% reference (1.21v) can be used to regulate the output down to 1.21v in nonisolated flyback and boost applications. additional semi-regulated outputs, if needed, can be generated by using additional secondary windings on the flyback converter transformer. the max17595/MAX17596/max17597 family utilizes peak-current-mode control and external compensation for optimizing closed-loop performance. the devices include cycle-by-cycle peak current limit, and eight consecutive occurrences of current-limit-event trig - ger hiccup mode, which protects external com - ponents by halting switching for a period of 32,768 cycles. the devices also include voltage soft-start for nonisolated designs, and current soft-start for isolated designs to allow monotonic and smooth rise of the outpu voltage during startup. the voltage and current soft-start modes can be selected using the slope pin. see figure 1 for more information. input voltage range ( v in ) the max17595 has different rising and falling under - voltage lockout (uvlo) thresholds on the v in pin than the thresholds of the MAX17596/max17597. the thresh - olds for the max17595 are optimized for implementing power supply startup schemes, typically used for offline ac-dc power supplies. the max17595 is well-suited for operation from rectified dc bus in ac-dc power-supply applications, which are typical of front-end industrial power-supply applications. as such, the max17595 has no limitation on maximum input voltage, as long as the external components are rated suitably and the maximum operating voltages of the max17595 are respected. the max17595 can be successfully used in universal input (85v to 265v ac) rectified bus applications, in recti - fied 3-phase dc bus applications, and in telecom (36v to 72v dc) applications. the MAX17596/max17597 are intended to implement flyback (isolated and nonisolated) and boost convert - ers. the v in pin of the MAX17596/max17597 has a maximum operating voltage of 36v. the MAX17596/ max17597 implement rising and falling thresholds on the v in pin that assume power-supply startup schemes typical of low-voltage dc-dc applications, down to an input voltage of 4.5v dc. therefore, flyback /boost converters with a 4.5v to 36v supply voltage range can be implemented with the MAX17596/max17597. pin name function 13 v drv linear regulator output and driver input. connect input bypass capacitor from v drv to sgnd as close as possible to the ic. 14 v in internal v drv regulator input. connect v in to the input voltage source. bypass v in to pgnd with a 1 f f minimum ceramic capacitor. 15 en/uvlo enable/undervoltage lockout. to externally program the uvlo threshold of the input supply, connect a resistive divider between input supply, en, and sgnd. 16 ovi overvoltage comparator input. connect a resistive divider between the input supply, ovi, and sgnd to set the input overvoltage threshold. ep exposed pad
???????????????????????????????????????????????????????????????? maxim integrated products 11 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators figure 1. max17595/MAX17596/max17597 block diagram control and driver logic hiccup 8 peak events or 1 runaway ssdone ss mode ss mode ss ss mode ss ssdone 1.23v chippen dither (sync) 1.21v 1.21v uvlo v drv dither ndrv pgnd cs slope comp fb v in en / uvlo ovi rt ss sgnd 7.5v (max17595) or 5v (MAX17596/ max17597) chippen/ hiccup (factory option) ss osc peaklim comp 305mv 360mv fixed or var 10a 10a 5a 50a runaway comp pwm comp osc osc 70ns blanking current soft-start r r voltage soft-start 1.21v 1x driver v drv 2v/ 0.4v pgnd slope decode 5v ldo pok av max17595 MAX17596 max17597 ldo thermal sensor chipen
???????????????????????????????????????????????????????????????? maxim integrated products 12 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators internal linear regulator (v drv ) the internal functions and driver circuits are designed to operate from 7.5v (max17595) or 5v (MAX17596/ max17597) power supply voltages. the max17595/ MAX17596/max17597 family has an internal linear regu - lator that is powered from the v in pin. the output of the linear regulator is connected to the v drv pin, and should be decoupled with a 1 f f capacitor to ground for stable operation. the v drv regulator output supplies all the oper - ating current of the max17595/MAX17596/max17597. the maximum operating voltage on the v in pin is 29v for the max17595, and 36v for the MAX17596/max17597. n-channel mosfet gate driver (ndrv) the max17595/MAX17596/max17597 family offers a built-in gate driver for driving an external n-channel mosfet. the ndrv pin can source/sink currents in excess of 650ma /1000ma. maximum duty cycle the max17595/MAX17596 operate at a maximum duty cycle of 49%. the max17597 offers a maximum duty cycle of 94% to implement flyback and boost converters involving large input-to-output voltage ratios in dc-dc applications. slope compensation is necessary for stable operation of peak-current-mode controlled converters such as the max17595/MAX17596 /max17597 at duty cycles greater than 50%, in addition to the loop compen - sation required for small signal stability. the max17595/ MAX17596/max17597 implement a slope pin for this purpose. see the slope compensation section for more details. soft-start (ss) the max17595/MAX17596/max17597 devices imple - ment soft-start operation for the flyback/boost regulator. a capacitor connected to the ss pin programs the soft- start period. the soft-start feature reduces input inrush current during startup. the devices allow the end user to select between voltage soft-start, usually preferred in nonisolated applications, and current soft-start, which is useful in isolated applications to get a monotonic and smooth rise in output voltage. see the input voltage range (v in ) section. soft-stop a soft-stop feature can be requested from the factory. this feature ramps down the duty cycle of operation of the converter to zero in a controlled fashion, and enables controlled ramp down of output voltage. the soft-stop duration is twice that of the programmed soft-start period. this is particularly useful in implementing controlled shutdown of output voltage in isolated power converters. switching frequency selection (rt) the ics switching frequency is programmable between 100khz and 1mhz with a resistor r rt connected between rt and sgnd. use the following formula to determine the appropriate value of r rt needed to generate the desired output-switching frequency (f sw ): = 10 rt sw 10 r f where f sw is the desired switching frequency. frequency dithering for spread-spectrum applications (low emi) the switching frequency of the converter can be dithered in a range of q 10% by connecting a capaci - tor from dither/sync to sgnd, and a resistor from dither to rt, as shown in the typical operating circuits . spread-spectrum modulation technique spreads the energy of switching frequency and its harmonics over a wider band while reducing their peaks, helping to meet stringent emi goals. applications information startup voltage and input overvoltage protection setting (en /uvlo, ovi) the devices en/uvlo pin serves as an enable/disable input, as well as an accurate programmable input uvlo pin. the devices do not commence startup operation unless the en/uvlo pin voltage exceeds 1.21v (typ). the devices turn off if the en/uvlo pin voltage falls below 1.15v (typ). a resistor-divider from the input dc bus to ground can be used to divide down and apply a fraction of the input dc voltage (v dc ) to the en/uvlo pin. the values of the resistor-divider can be selected so that the en/uvlo pin voltage exceeds the 1.23v (typ) turn-on threshold at the desired input dc bus voltage. the same resistor-divider can be modified with an additional resistor (r ovi ) to implement input overvoltage protec - tion in addition to the en/uvlo functionality as shown in figure 2 . when voltage at the ovi pin exceeds 1.21v (typ), the devices stop switching and resume switching opera tions only if voltage at the ovi pin falls below 1.15v (typ). for given values of startup dc input
???????????????????????????????????????????????????????????????? maxim integrated products 13 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators figure 2. programming en /uvlo and ovi voltage (v start ) and input overvoltage-protection voltage (v ovi ), the resistor values for the divider can be calculated as fol lows, assuming a 24.9k i resistor for r ovi : ovi en ovi start v r r 1k v ?? =? ?? ?? i where r ovi is in k i , while v start and v ovi are in volts. start sum ovi en v r r r 1k 1.21 ?? = + ? ?? ?? ?? ?? i where r en , r ovi is in k i , while v start is in volts. in universal ac input applications, r sum might need to be implemented as equal resistors in series (r dc1 , r dc2 , and r dc ) so that voltage across each resistor is limited to its maximum operation voltage. = = = sum dc1 dc2 dc3 r rr r k 3 i for low-voltage dc-dc applications based on the MAX17596/max17597, a single resistor can be used in the place of r sum , as the voltage across it is approxi - mately 40v. startup operation the max17595 is optimized for implementing an offline single-switch flyback converter and has a 20v v in uvlo wake-up level with hysteresis of 15v (min). in offline applications, a simple cost-effective rc startup circuit is used. when the input dc voltage is applied, the startup resistor (r start ) charges the startup capacitor (c start ), causing the voltage at the v in pin to increase towards the wake-up v in uvlo threshold (20v typ). during this time, the max17595 draws a low startup current of 20 f a (typ) through r start . when the voltage at v in reaches the wake-up v in uvlo threshold, the max17595 com - mences switching and control operations. in this con - dition, the max17595 draws 2ma (typ) current from c start , when operated at 1mhz switching frequency, for its internal operation. in addition, the average value of gate drive current is also drawn from c start , which is a function of the gate charge of the external mosfet used. since this total current cannot be supported by the current through r start , the voltage on c start starts to drop. when suitably configured, as shown in figure 9 , the external mosfet is switched by the ndrv pin and the flyback converter generates an output voltage (v out ), and a bias voltage (v bias ) that is bootstrapped to the v in pin through the diode (d2). if v bias exceeds the sum of 7v, and the drop across d2 before the volt - age on c start falls below 7v, then the v in voltage is sustained by v bias , allowing the max17595 to continue operating with energy from v bias . the large hysteresis (13v typ) of the max17595 allows for a small startup capacitor (c start ). the low startup current (20 f a typ) allows the use of a large startup resistor (r start ), thus reducing power dissipation at higher dc bus volt - ages. figure 3 shows the typical rc startup scheme for the max17595, when the output voltage v out is used as the bias voltage to sustain switching operation. r start might need to be implemented as equal, multiple resistors in series (r in1 , r in2 , and r in3 ) to share the applied high dc voltage in offline applications so that the voltage across each resistor is limited to its maximum continuous operating voltage rating. r start and c start can be calculated as: ?? ?? = + ?? ?? ?? ?? ?? gate sw ss start in 6 qft ci f 10 10 f where i in is the supply current drawn at the v in pin in ma, q gate is the gate charge of the external mosfet used in nc, f sw is the switching frequency of the convert - er in hz, and t ss is the soft-start time programmed for the flyback converter in ms. see the programming soft-start of flyback/boost converter (ss) section. ovi r dc1 r sum r dc2 r dc3 en /u vlo r en r ovi max17595 MAX17596 max17597
???????????????????????????????????????????????????????????????? maxim integrated products 14 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators ( ) start start start v 10 50 rk 1c ? = + ?? ?? i where c start is the startup capacitor in f f. for designs that cannot accept power dissipation in the startup resistors at high dc input voltages in offline appli- cations, the startup circuit can be set up with a current source instead of a startup resistor as shown in figure 4 . the startup capacitor (c start ) can be calculated as: ?? ?? = + ?? ?? ?? ?? ?? gate sw ss start in 6 qft ci f 10 10 f where i in is the supply current drawn at the v in pin in ma, q gate is the gate charge of the external mosfet used in nc, f sw is the switching frequency of the con - verter in khz, and t ss is the soft-start time programmed for the flyback converter in ms. figure 3. max17595 rc-based startup circuit figure 4. max17595 current-source-based startup circuit v drv v dc c f v in v out v out c vdrv c start ldo drv cs ndrv max17595 v dc r in1 r start r in2 r in3 r in1 v dc r sum r in2 v drv v dc c out d1 v in r isrc v out v out c vdrv r s c start r in3 ldo drv cs ndrv max17595
???????????????????????????????????????????????????????????????? maxim integrated products 15 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators resistors r sum and r isrc can be calculated as: start sum beq1 isrc v rm 10 v rm 70 = w = w the v in uvlo wakeup threshold of the MAX17596/ max17597 is set to 4.1v (typ) with a 200mv hyster esis, optimized for low-voltage dc-dc applications down to 4.5v. for applications where the input dc voltage is low enough (e.g., 4.5v to 5.5v dc) that the power loss incurred to supply the operating current of the MAX17596/ max17597 can be tolerated, the v in pin is directly connected to the dc input, as shown in figure 5 . in the case of higher dc input voltages (e.g., 16v to 32v dc), a startup circuit, such as that shown in figure 6 , can be used to minimize power dissipation in the startup circuit. in this startup scheme, the transistor (q1) supplies the switching current until a bias winding nb comes up. the resistor (r z ) can be calculated as: z inmin r 9 (v 6.3) k = ?w figure 6. MAX17596/max17597 typical startup circuit with bias winding to turn off q1 and reduce power dissipation figure 5. MAX17596/max17597 typical startup circuit with v in connected directly to dc input v drv v dc c out c drv np ns d1 v in v in v out r s cs ndrv ldo MAX17596 max17597 v drv v dc c out c drv np nb ns d1 v in v in r z z d1 6.3v c in r s cs ndrv MAX17596 max17597 ldo q 1
???????????????????????????????????????????????????????????????? maxim integrated products 16 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators programming soft-start of flyback / boost converter (ss) the soft-start period in the voltage soft-start scheme of the devices can be programmed by selecting the value of the capacitor connected from the ss pin to sgnd. the capacitor c ss can be calculated as: ss ss c 8.2645 t nf = where t ss is expressed in ms. the soft-start period in the current soft-start scheme depends on the load at the output and the soft-start capacitor. programming output voltage the devices incorporate an error amplifier with a 1% pre - cision voltage reference that enables negative feedback control of the output voltage. the output voltage of the switching converter can be programmed by selecting the values for the resistor-divider connected from v out , and the flyback /boost output to ground, with the midpoint of the divider connected to the fb pin ( figure 7 ). with r b selected in the 20k i to 50k i range, r u can be calcu - lated as: out ub b v r r 1 k , where r is in k . 1.21 ?? =? ?? ?? ii peak-current-limit setting (cs) the d evices include a robust overcurrent protection scheme that protects the device under overload and short-circuit conditions. a current-sense resistor (r cs in the typical operating c ircuits ), connected between the source of the mosfet and pgnd, sets the peak current limit. the current-limit comparator has a voltage trip level (v cs-peak ) of 300mv. use the following equa - tion to calculate the value of r cs : cs mosfet 300mv r i = i where i mosfet is the peak current flowing through the mosfet. when the voltage produced by this current (through the current-sense resistor) exceeds the current- limit comparator threshold, the mosfet driver (ndrv) terminates the current on-cycle within 30ns (typ). the devices implement 65ns of leading-edge blanking to ignore leading-edge current spikes. these spikes are caused by reflected secondary currents, capacitance discharging current at the mosfets drain, and gate charging c urrent. use a small rc network for additional filtering of the leading edge spike on the sense waveform when needed. set the corner frequency between 10mhz and 20mhz. after the leading-edge blanking time, the device monitors v cs . the duty cycle is terminated immediately when v cs exceeds 300mv. the devices offer a runaway current limit scheme that protects the devices under high-input-voltage short- circuit conditions when there is insufficient output volt - age available to restore inductor current built up during the on period of the flyback/boost converter. either eight consecutive occurrences of the peak-current-limit event or one occurrence of the runaway current limit trigger a hiccup mode that protects the converter by immediately suspending switching for a period of time (t rstart ). this allows the overload current to decay due to power loss in the converter resistances, load, and the output diode of the flyback /boost converter before soft-start is attempted again. the runaway current limit is set at a v cs-peak of 360mv (typ). the peak-current-limit- triggered hiccup operation is disabled until the end of the soft-start period, while the runaway current-limit- triggered hiccup operation is always enabled. programming slope compensation (slope) the max17595/max1759 6 operate at a maximum duty cycle of 49%. in theory, they do not require slope compensation to prevent subharmonic instability that occurs naturally in continuous-conduction mode (ccm) peak-current-mode-controlled converters operating at duty cycles greater than 50%. in practice, the max17595/ MAX17596 require a minimum amount of slope compen - sation to provide stable operation. the devices allow the user to program this default value of slope compensation simply by leaving the slope pin unconnected. it is rec - ommended that discontinuous-mode designs also use this minimum amount of slope compensation to provide better noise immunity and jitte r-free operation. figure 7. programming output voltage fb r u r b v out max17595 MAX17596 max17597
???????????????????????????????????????????????????????????????? maxim integrated products 17 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators the max17597 flyback /boost converter can be designed to operate in either discontinuous-conduction mode (dcm) or to enter into the continuous-conduction mode at a specific load condition for a given dc input voltage. in continuous-conduction mode, the flyback/ boost converter needs slope compensation to avoid subharmonic instability that occurs naturally over all specified load and line conditions in peak-current-mode controlled converters operating at duty cycles greater than 50%. a minimum amount of slope signal is added to the sensed current signal even for converters operating below 50% duty to provide stable, jitter-free operation. the slope pin allows the user to program the necessary slope compensation by setting the value of the resistor (r slope ) connected from the slope pin to ground. e slope s8 rk 1.55 ? = i where the slope (s e ) is expressed in mv/ f s. frequency dithering for spread-spectrum applications (low emi) the switching frequency of the converter can be dithered in a range of q 10% by connecting a capacitor from dither/sync to sgnd, and a resistor from dither to rt as shown in the typical operating circuits . this results in lower emi. a current source at dither/sync charges the capacitor c dither to 2v at 50 f a. upon reaching this trip point, it discharges c dither to 0.4v at 50 f a. the charging and discharging of the capacitor generates a triangular wave - form on dither/sync with peak levels at 0.4v and 2v and a frequency that is equal to: = tri dither 50 a f c 3.2v f typically, f tri should be set close to 1khz. the resistor r dither connected from dither/sync to rt deter - mines the amount of dither as follows: rt dither r % dither r = where %dither is the amount of dither expressed as a percentage of the switching frequency. setting r dither to 10 x r rt generates q 10% dither. error amplifier, loop compensation, and power stage design of flyback /boost converter the flyback /boost converter requires proper loop compen sation to be applied to the error-amplifier output to achieve stable operation. the goal of the compensator design is to achieve desired closed-loop bandwidth, and sufficient phase margin at the crossover frequency of the open-loop gain-transfer function of the converter. the error amplifier provided in the devices is a transcon - ductance amplifier. the compensation network used to apply the necessary loop compensation is shown in figure 8 . the flyback/boost converter can be used to implement the following converters and operating modes: ? nonisolated flyback converter in discontinuous-con - duction mode (dcm flyback) ? nonisolated flyback converter in continuous-conduc - tion mode (ccm flyback) ? boost converter in discontinuous-conduction mode (dcm boost) ? boost converter in continuous-conduction mode (ccm boost) calculations for loop-compensation values (r z , c z , and c p ) for these converter types and design procedures for power-stage components are detailed in the following sections. figure 8. error-amplifier compensation network comp r z c z c p max17595 MAX17596 max17597
???????????????????????????????????????????????????????????????? maxim integrated products 18 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators dcm flyback primary inductance selection in a dcm flyback converter, the energy stored in the primary inductance of the flyback transformer is delivered entirely to the output. the maximum primary inductance value for which the converter remains in dcm at all operating conditions can be calculated as: ( ) ( ) + 2 inmin max primax out d out sw v d 0.4 l v vi f where d max is chosen as 0.35 for the max17595/ MAX17596 and 0.7 for the max17597; v d is the voltage drop of the out put rectifier diode on the secondary winding, and f sw is the switching frequency of the power converter. choose the primary inductance value to be less than l primax . duty cycle calculation the accurate value of the duty cycle (d new ) for the selected primary inductance (l pri ) can be calculated using the following equation: ( ) + = pri out d out sw new inmin 2.5 l v v i f d v turns ratio calculation (ns/np) transformer turns ratio (k = ns/np) can be calculated as: ( ) out d max inmin max v v (1 d ) k vd + ? = peak/rms current calculation the transformer manufacturer needs rms current values in the primary and secondary to design the wire diameter for the different windings. peak current calcula - tions are useful in setting the current limit. use the fol - lowing equations to calculate the primary and secondary peak and rms currents. maximum primary peak current: = inmin new pripeak pri sw vd i lf maximum primary rms current: new prirms pripeak d ii 3 = maximum secondary peak current: pripeak secpeak i i k = maximum primary peak current: = + secpeak pri sw secrms pripeak out d i xl xf ii 3 x (v v ) for the purpose of current-limit setting, i lim can be calcu - lated as follows: lim pripeak i i 1.2 = primary snubber selection ideally, the external mosfet experiences a drain-source voltage stress equal to the sum of the input voltage and reflected voltage across the primary winding during the off period of the mosfet. in practice, parasitic inductors and capacitors in the circuit, such as leakage inductance of the flyback transformer, cause voltage overshoot and ringing, in addition to the ideally expected voltage stress. snubber circuits are used to limit the voltage overshoots to safe levels within the voltage rating of the external mosfet. the snubber capacitor can be calculated using the following equation: 22 lk pripeak snub 2 out 2l i k c v = where l lk is the leakage inductance that can be obtained from the transformer specifications (usually 1.5%C2% of the primary inductance). the power to be dissipated in the snubber resistor is calculated using the following formula: = 2 snub lk pripeak sw p 0.833 l i f the snubber resistor is calculated based on the equation below: 2 out snub 2 snub 6.25 v r pk = the voltage rating of the snubber diode is: out dsnub inmax v v v 2.5 k ?? = + ?? ??
???????????????????????????????????????????????????????????????? maxim integrated products 19 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators output capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application, so that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as follows: = ? ?? ?+ ?? ?? step response out out response c sw it c v 0.33 1 t ff where i step is the load step, t response is the response time of the controller, d v out is the allowable output volt - age deviation, and f c is the target closed-loop crossover frequency. f c is chosen to be one-tenth of the switching frequency, f sw . for the flyback converter, the output capacitor supplies the load current when the main switch is on; therefore, the output voltage ripple is a function of load current and duty cycle. use the following equation to calculate the output capacitor ripple: ?? ? ?? ?? ?? ?= 2 new pripeak out cout pripeak sw out d i ki v 2i f c where i out is load current and d new is the duty cycle at minimum input voltage. input capacitor selection the max17595 is optimized to implement offline ac-dc converters. in such applications, the input capacitor must be selected based on either the ripple due to the rectified line voltage, or based on holdup-time requirements. holdup time can be defined as the time period over which the power supply should regulate its output voltage from the instant the ac power fails. the MAX17596/max17597 are useful in implementing low-voltage dc-dc applications where the switching- frequency ripple must be used to calculate the input capacitor. in both cases, the capacitor must be sized to meet rms current requirements for reliable operation. a) capacitor selection based on switching ripple (max1759 6 / max17597) for dc-dc applications, x7r ceramic capacitors are recommended due to their stability over the operating temperature range. the esr and esl of a ceramic capacitor are relatively low, so the ripple voltage is dominated by the capacitive component. for the flyback converter, the input capacitor sup - plies the current when the main switch is on. use the following equation to calculate the input capacitor for a specified peak-to-peak input switching ripple (v in_rip ): ( ) ?? ? ?? = 2 new pripeak new in sw in_rip d i 1 0.5 d c 2f v b) capacitor selection based on rectified line voltage ripple (max17595) for the flyback converter, the input capacitor supplies the input current when the diode rectifier is off. the voltage discharge (v in_rip ), due to the input average current, should be within the limits specified: = pripeak new in ripple in_rip 0.5 i d c fv where f ripple , the input ac ripple frequency equal to the supply frequency for half-wave rectification, is two times the ac supply frequency for full-wave rectification. c) capacitor selection based on holdup time require - ments (max17595) for a given output power (p holdup ) that needs to be delivered during holdup time (t holdup ), dc bus voltage at which the ac supply fails (v infail ), and the minimum dc bus voltage at which the converter can regulate the output voltages (v inmin ), the input capacitor (c in ) is estimated as: = ? holdup holdup in 22 infail inmin 3p t c (v v ) the input capacitor rms current can be calculated as: ( ) = 2 inmin max incrms sw pri 0.6 v d i fl
???????????????????????????????????????????????????????????????? maxim integrated products 20 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators external mosfet selection a mosfet selection criterion includes maximum drain voltage, pea k/ rms current in the primary, and the maximum allowable power dissipation of the package without exceeding the junction temperature limits. the voltage seen by the mosfet drain is the sum of the input voltage, the reflected secondary voltage on the trans - former primary, and the leakage inductance spike. the mosfets absolute maximum v ds rating must be higher than the worst-case drain voltage: ?? + ?? =+ ?? ?? ?? ?? ?? out diode dsmax inmax vv v v 2.5 k the drain current rating of the external mosfet is selected to be greater than the worst-case peak-current- limit setting. secondary diode selection secondary-diode selection criteria includes the maxi- mum reverse voltage, average current in the secondary- reverse recovery time, junction capacitance, and the maximum allowable power dissipation of the package. the voltage stress on the diode is the sum of the output voltage and the reflected primary voltage. the maximum operating reverse-voltage rating must be higher than the worst-case reverse voltage: secdiode inmax out v 1.25 (k v v ) = + the current rating of the secondary diode should be selected so that the power loss in the diode (given as the product of forward-voltage drop and the average diode current) should be low enough to ensure that the junction temperature is within limits. this necessitates that the diode current rating be in the order of 2 x i out to 3 x i out . select fast-recovery diodes with a recovery time less than 50ns, or schottky diodes with low junction capacitance. error amplifier compensation design the loop compensation values are calculated as: ?? ?? ?? + ?? ?? ?? ?? = 2 sw out out p z pri sw 0.1 f 1 vi f r 450 2l f where: = = = out p out out z zp p z sw i f vc 1 c rf 1 c rf f sw is the switching frequency of the devices. ccm flyback transformer turns ratio calculation (k = ns / np) the transformer turns ratio can be calculated using the following formula: ( ) out d max inmin max v v (1 d ) k vd + ? = where d max is the duty cycle assumed at minimum input (0.35 for the max17595/MAX17596 and 0.7 for the max17597). primary inductance calculation calculate the primary inductance based on the ripple: ( ) + ? = ? out d nom pri out sw v v (1 d ) k l 2i f where d nom , the nominal duty cycle at nominal operating dc input voltage v innom , is given as: ( ) ( ) out d nom innom out d v vk d v v vk + = ?? + + ?? the output current, down to which the flyback converter should operate in ccm, is determined by selection of the fraction a in the above primary inductance formula. for example, a should be selected as 0.15 so that the converter operates in ccm down to 15% of the maximum output load current. since the ripple in the primary current waveform is a function of duty cycle and is maximum at maximum dc input voltage, the maximum (worst-case) load current down to which the converter operates in ccm occurs at maximum operating dc input voltage. v d is the forward drop of the selected output diode at maximum output current.
???????????????????????????????????????????????????????????????? maxim integrated products 21 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators peak and rms current calculation rms current values in the primary and secondary are needed by the transformer manufacturer to design the wire diameter for the different windings. peak current calculations are useful in setting the current limit. use the following equations to calculate the primary and secondary peak and rms currents. maximum primary peak current: ?? ?? = + ?? ?? ? ?? ?? out inmin max pripeak max pri sw i kv d i 1d 2l f maximum primary rms current: ( ) 22 pripeak pri pripeak pri prirms max i ii i i 3 d +? ? ? = where d i pri is the ripple current in the primary current waveform and is given by: ?? ?= ?? ?? inmin max pri pri sw vd i lf maximum secondary peak current: pripeak secpeak i i k = maximum secondary rms current: ( ) 22 secpeak sec secpeak sec secrms max i ii i i 3 1d +? + ? = ? where d i sec is the ripple current in the secondary current waveform and is given by: ?? ?= ?? ?? inmin max sec pri sw vd i l fk for the purpose of current-limit setting, the peak current can be calculated as follows: lim pripeak i i 1.2 = primary rcd snubber selection the design procedure for primary rcd snubber selection is identical to that outlined in the dcm flyback section. output capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application so that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: = ? ?+ step response out out response c sw it c v 0.33 1 t () ff where i step is the load step, t response is the response time of the controller, d v out is the allowable output voltage deviation, and f c is the target closed-loop cross - over frequency. f c is chosen to be less than one-fifth of the worst-case (lowest) rhp zero frequency f rhp . the right half-plane zero frequency is calculated as follows: ? = 2 max out zrhp 2 max pri out (1 d ) v f 2d li k for the ccm flyback converter, the output capacitor supplies the load current when the main switch is on; therefore, the output voltage ripple is a function of load current and duty cycle. use the following equation to estimate the output voltage ripple: ?= out max cout sw out id v fc input capacitor selection the design procedure for input capacitor selection is identical to that outlined in the dcm flyback section. external mosfet selection the design procedure for external mosfet selection is identical to that outlined in the dcm flyback section. secondary-diode selection the design procedure for secondary-diode selection is identical to that outlined in the dcm flyback section. error amplifier compensation design in the ccm flyback converter, the primary inductance and the equivalent load resistance introduces a right half-plane zero at the following frequency: ? = 2 max out zrhp 2 max pri out (1 d ) v f 2d li k
???????????????????????????????????????????????????????????????? maxim integrated products 22 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators the loop compensation values are calculated as: ?? = + ?? ? ?? 2 out rhp z max p 225 i f r1 (1 d ) 5 f where f p , the pole due to output capacitor and load is given by: + = max out p out out (1 d ) i f 2c v the above selection of r z sets the loop-gain crossover frequency (f c , where the loop gain equals 1) equal to 1/5th the right half-plane zero frequency. zrhp c f f 5 with the control loop zero placed at the load pole frequency: = z zp 1 c 2r f with the high-frequency pole placed at half the switching frequency: = p z sw 1 c rf dcm boost in a dcm boost converter, the inductor current returns to zero in every switching cycle. energy stored during the on-time of the main switch q1 is delivered entirely to the load in each switching cycle. inductance selection the design procedure starts with calculating the boost converters input inductor, such that it operates in dcm at all operating line and load conditions. the critical inductance required to maintain dcm operation is calculated as: ( ) ?? ? ?? ?? 2 out in_min in_min in 2 out out sw v v v 0.4 l iv f where v inmin is the minimum input voltage. peak/rms currents calculation for the purposes of setting the current limit, the peak cur - rent in the inductor can be calculated as: lim pk i i 1.2 = where is i pk given by: ? ?? = ?? ?? out in_min out pk inmin sw 2 (v v ) i i lf l inmin is the minimum value of the input inductor taking into account tolerance and saturation effects. output capacitor selection the output capacitance can be calculated as follows: = ? ?+ step response out out response c sw it c v 0.33 1 t () ff where i step is the load step, t response is the response time of the controller, d v out is the allowable output voltage deviation, and f c is the target closed-loop crossover frequency. f c is chosen to be one-tenth of the switching frequency f sw . for the boost converter, the output capacitor supplies the load current when the main switch is on; therefore, the output voltage ripple is a function of duty cycle and load current. use the following equation to calculate the output capacitor ripple: out in pk cout inmin out i li v vc ?= input capacitor selection the input ceramic capacitor value required can be calculated based on the ripple allowed on the input dc bus. the input capacitor should be sized based on the rms value of the ac current handled by it. the calcula - tions are: ?? = ?? ? ?? out in inmin swmin max 3.75 i c v f (1 d ) the capacitor rms can be calculated as: pk cin_rms i i 23 = error amplifier compensation design the loop compensation values for the error amplifier can now be calculated as: ( ) = = dc m z dc sw g g 10 c g 10 nf 2f where g dc , the dc gain of the power stage, is given as:
???????????????????????????????????????????????????????????????? maxim integrated products 23 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators ? = ? ? = ? 2 out inmin sw out in dc 2 out inmin out out out out inmin z out z out inmin 8 (v v ) f v l g (2v v ) i v c (v v ) r i c (2v v ) where v inmin is the minimum operating input voltage, and i out is the maximum load current. out p z c esr c r = slope compensation in theory, the dcm boost converter does not require slope compensation for stable operation. in practice, the converter needs a minimum amount of slope for good noise immunity at very light loads. the minimum slope is set for the MAX17596/max17597 by leaving the slope pin unconnected. output diode selection the voltage rating of the output diode for the boost converter ideally equals the output voltage of the boost converter. in practice, parasitic inductances and capacitances in the circuit interact to produce voltage overshoot during the turn-off transition of the diode that occurs when the main switch q1 turns on. the diode rating should therefore be selected with the necessary margin to accommodate this extra voltage stress. a volt - age rating of 1.3 x v out provides the necessary design margin in most cases. the current rating of the output diode should be selected so that the power loss in the diode (given as the prod - uct of forward-voltage drop and the average diode current) should be low enough to ensure that the junction temperature is within limits. this necessitates the diode current rating to be in the order of 2 x i out to 3 x i out . select fast-recovery diodes with a recovery time less than 50ns or schottky diodes with low junction capacitance. mosfet rms current calculation the voltage stress on the mosfet ideally equals the sum of the output voltage and the forward drop of the output diode. in practice, voltage overshoot and ringing occur due to action of circuit parasitic elements during the turn-off transition. the mosfet voltage rating should be selected with the necessary margin to accommodate this extra voltage stress. a voltage rating of 1.3 x v out provides the necessary design margin in most cases. the rms current in the mosfet is useful in estimating the conduction loss, and is given as: = 3 pk ins sw mosfetrms inmin i lf i 3v where i pk is the peak current calculated at the lowest operating input voltage, v inmin . ccm boost in a ccm boost converter, the inductor current does not return to zero during a switching cycle. since the max17597 implements a nonsynchronous boost converter, the inductor current will enter dcm operation at load currents below a critical value equal to half of the peak-peak ripple in the inductor current. inductor selection the design procedure starts with calculating the boost converters input inductor at nominal input voltage for a ripple in the inductor current equal to 30% of the maximum input current. ? = in in out sw v d (1 d) l 0.3 i f where d is the duty cycle calculated as: out d in out d ds out v vv d v v (r i ) +? = +? v d is the voltage drop across the output diode of the boost converter at maximum output current, and r ds is the resistance of the mosfet in the on state. peak/rms current calculation for the purposes of setting the current limit, the peak current in the inductor and mosfet can be calculated as follows: ? ?? = + ?? ? ?? < out max max out pk inmin sw max v d (1 d ) i i l f (1 d) 1.2 for d 0.5 ?? = + ?? ? ?? out out pk inmin sw max 0.25 v i an d, i l f (1 d) 1.2 for d 0.5
???????????????????????????????????????????????????????????????? maxim integrated products 24 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators d max , the maximum duty cycle, is obtained by substituting the minimum input operating voltage v inmin in the equation above for duty cycle. l inmin is the minimum value of the input inductor taking into account tolerance and saturation effects. output capacitor selection the output capacitance can be calculated as follows: = ? ?+ step response out out response c sw it c v 0.33 1 t () ff where i step is the load step, t response is the response time of the controller, d v out is the allowable output voltage deviation, and f c is the target closed-loop crossover frequency. f c is chosen to be one-tenth of the switching frequency f sw . for the boost converter, the output capacitor supplies the load current when the main switch is on; therefore, the output voltage ripple is a function of duty cycle and load current. use the following equation to calculate the output capacitor ripple: ?= out max cout out sw id v cf input capacitor selection the input ceramic capacitor value required can be calculated based on the ripple allowed on the input dc bus. the input capacitor should be sized based on the rms value of the ac current handled by it. the calculations are: ?? = ?? ? ?? out in inmin sw max 3.75 i c v f (1 d ) the input capacitor rms current can be calculated as: lin cin_rms i i 23 ? = where: ? ?? ?= ?? ?? < out max max lin inmin sw max v d (1 d ) i lf for d 0.5, ?? ?= ?? ?? out lin inmin sw max 0.25 v i lf for d 0.5 error amplifier compensation design the loop compensation values for the error amplifier can now be calculated as: 2 out out min z outmin in 250 v c (1 d ) r il ? = where d min is the duty cycle at the highest operating input voltage, and i outmin is the minimum load current. = = out out z out z p sw z vc c 2i r 1 c fr slope compensation ramp the slope required to stabilize the converter at duty cycles greater than 50% can be calculated as follows: out inmin e in 0.5 (0.82 v v ) s v/ s, l ? = f where l in is in h. output diodes selection the design procedure for output-diode selection is identical to that outlined in the dcm boost section. mosfet rms current calculation the voltage stress on the mosfet ideally equals the sum of the output voltage and the forward drop of the output diode. in practice, voltage overshoot and ringing occur due to action of circuit parasitic elements during the turn-off transition. the mosfet voltage rating should be selected with the necessary margin to accommodate this extra voltage stress. a voltage rating of 1.3 x v out provides the necessary design margin in most cases. the rms current in the mosfet is useful in estimating the conduction loss, and is given as: out max mosfetrms max id i (1 d ) = ? where d max is the duty cycle at the lowest operating input voltage, and i out is the maximum load current.
???????????????????????????????????????????????????????????????? maxim integrated products 25 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators typical operating circuits figure 9. max17595 typical application circuit (universal offline isolated power supply) n1 v in r23 open 1 6 5 4 2 r26 8.06ki r25 open r28 562ki r29 49.9ki r22 1.2ki r24 open c8 2.2f c11 330pf r21 0.1i r20 100i v fb v drv v in v out r27 20ki c18 15000pf c17 47pf sgnd sgnd 1 2 3 u3 sgnd sgnd sgnd sgnd sgnd max17595 r4 2.67mi r3 2.67mi r2 2.67mi r8 1.5mi r1 10 ac1 ac2 r7 1.5mi c1 0.1f/ 275v ac r5 75ki r6 24.9ki r12 12.1ki v fb v in comp sgnd dither / sync dither / sync r11 open r14 402ki r15 402ki r16 402ki r10 0i c7 47nf c5 100f 450v c9 2.2f 50v c12 1f c10 3300pf r17 100ki r18 100ki l1 6.6mh d1 1 1 5 6 7 11 8 12 2 2 3 4 c6 0.47f r19 0i pgnd pgnd pgnd v in v in v out v out gnd0 gnd0 t1 d6 d2 d3 d4 r1 0i c19 open c13 22f c14 22f c15 22f c16 22f r9 10ki rt slope ndrv pgnd pgnd pgnd cs v drv n.c. n.c. v drv v drv ss fb en / uvlo en / uvlo ovi ovi sgnd c4 open c3 short c2 short r13 10ki dither/ sync dither / sync
???????????????????????????????????????????????????????????????? maxim integrated products 26 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators typical operating circuits (continued) figure 10. MAX17596 typical application circuit (power supply for dc-dc applications) n1 r8 100i r9 0.5i r12 open r14 1ki r16 20ki r15 30.3ki r17 10ki r13 511i c12 open v fb v cc v out c6 300pf c7 2.2f 16v c13 4.7nf c14 33pf u2 1 2 3 u3 ndrv ep v in ss slope fb comp pgnd c5 47nf c3 0.22f 50v c2 4.7f 50v c1 47f 50v pgnd v in v out gnd 5v, 1.5a output 18v to 36v input v drv r7 10ki pgnd ovi en / uvlo r6 20ki r5 348ki r4 15ki r3 10ki r1 7.5ki c4 33nf, 50v c9 22f 16v c10 22f 16v c11 22f 16v d1 r2 short v fb en / uvlo ovi v in v in r10 17.4ki r11 open c8 short rt sgnd v drv cs dither MAX17596 d2 t1 v out
???????????????????????????????????????????????????????????????? maxim integrated products 27 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators typical operating circuits (continued) figure 11. max17597 typical application circuit (nonsynchronous boost converter) ep v in l1 220h c7 4.7f/ 35v n1 r8 100i r4 5ki r3 184ki r2 9.92ki v drv r1 120ki r10 17.4ki r7 49.9ki r6 25ki r5 481ki r9 0.5i c8 300pf r11 open c9 short v out 24v, 0.3a v out d1 ss26-tp ndrv cs rt dither sgnd sgnd pgnd ovi en / uvlo pgnd comp fb slope v drv v in ss c6 120pf c5 47nf c4 2.2f c3 47f pgnd 10.8v to 13.2v dc v in v in c2 0.1f c1 47f v in max17597
???????????????????????????????????????????????????????????????? maxim integrated products 28 max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators layout, grounding and bypassing all connections carrying pulsed currents must be very short and as wide as possible. the inductance of these connections must be kept to an absolute minimum due to the high di/dt of the currents in high-frequency-switching power converters. this implies that the loop areas for forward and return pulsed currents in various parts of the circuit should be minimized. additionally, small current loop areas reduce radiated emi. similarly, the heatsink of the mosfet presents a dv/dt source; therefore, the surface area of the mosfet heatsink should be minimized as much as possible. ground planes must be kept as intact as possible. the ground plane for the power section of the converter should be kept separate from the analog ground plane, except for a connection at the least noisy section of the power ground plane, typically the return of the input filter capacitor. the negative terminal of the filter capacitor, the ground return of the power switch and current sensing resistor, must be close together. pcb layout also affects the thermal performance of the design. a number of thermal vias that connect to a large ground plane should be provided under the exposed pad of the part for efficient heat dissipation. for a sample layout that ensures first-pass success, refer to the max17595 evalu - ation kit layout available at www.maxim-ic.com . for universal ac input designs, follow all applicable safety regulations. offline power supplies can require ul, vde, and other similar agency approvals. package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. ordering information/selector guide + denotes a lead(pb)-free/rohs-compliant package. * exposed pad. package type package code outline no. land pattern no. 16 tqfn t1633+4 21-0136 90-0032 part temp range pin package functionality uvlo, v in clamp d max max17595 ate+ -40 n c to +125 n c 16 tqfn-ep* offline flyback controller 20v, yes 46% MAX17596 ate+ -40 n c to +125 n c 16 tqfn-ep* low-voltage dc-dc flyback controller 4v, no 46% max17597 ate+ -40 n c to +125 n c 16 tqfn-ep* boost controller 4v, no 93%
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 29 ? 2012 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 1/12 initial release max17595/MAX17596/max17597 peak-current-mode controllers for flyback and boost regulators

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